Abstract
Defines the operation, functions, and attributes of the IEEE 1296 bus standard. Defines a high-performance 32-bit synchronous bus standard. Intended for general purpose applications to optimize block transfers, including protocol for message passing. Intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system and heterogeneous processor types in the same system.
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General information
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Status: PublishedPublication date: 1994-12Stage: International Standard confirmed [90.93]
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Edition: 1Number of pages: 130
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Technical Committee :ISO/IEC JTC 1/SC 25ICS :35.160
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